(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method to protect the edge of a low-k film, deposited over a semiconductor surface.
(2) Description of the Prior Art
This invention relates to controlling the creation of the outer perimeter of a semiconductor surface over which a layer of low-k dielectric has been deposited. During the manufacturing of semiconductor wafers, these wafers undergo numerous steps of processing interspersed with steps of moving the wafers between different processing stations. The wafers may also be stored during a period of process interruption of the wafer. During the handling, processing and storing of the wafers physical damage may be inflicted on the wafer.
Since the edge of the wafer is physically the most exposed, this edge is also most prone to be damaged during wafer handling. In addition, films of semiconductor materials are frequently deposited over the surface of the wafer or over the surface of a layer that has been deposited over the surface of the wafer, exposing the edge of the deposited layers of semiconductor material to damage.
Films of semiconductor material that are deposited over a layer above the surface of a wafer are frequently deposited using methods of spin coating. These methods incur centrifugal forces to the coated layer of semiconductor material, which frequently results in the coated semiconductor material accumulating, in the form of beads, around the perimeter of the wafer.
This effect is further magnified if, for reasons of deposition efficiency, the wafer is rotated during the deposition process. Since these beads, that form around the perimeter of the wafer, are extrusions from the surface of the wafer, these beads are more exposed and are therefore more prone to cause additional damage (in the form of surface chipping) to the surface of the deposited layer of semiconductor material. The chipping of the surface of deposited layers of semiconductor material readily leads to film peeling and can result in making a significant portion of the deposited layer unusable.
A frequently applied method to provide improved surface planarity and enhanced surface protection of a layer of deposited semiconductor material is to apply a layer of Spin-On-Glass (SOG) over the surface of the deposited semiconductor material.
The layer of SOG is, as the name implies, spun onto the surface of the wafer by spin coating after which the layer of SOG is heated in order to convert the (liquid) layer of SOG into a solid coating having a glassy surface.
Since the layer of SOG is applied by spinning the (liquid) SOG material over the wafer surface (the SOG is applied as small drops of SOG to the center of the spinning wafer, from where centrifugal forces distribute the SOG over the surface of the spinning wafer), an excess of SOG tends to accumulate around the perimeter of the surface over which the SOG is applied, leading to the formation of a relatively thicker layer of SOG (also referred to as edge bead) around this perimeter.
This leads to the requirement that the perimeter of the surface of semiconductor material over which the layer of SOG has been deposited must be further processed in order to remove the edge bead and to provide good planarity to the upper surface.
Methods of applying a layer of photoresist and etching the perimeter of the surface have been known in the art but are cumbersome and expensive. These methods have been augmented by modified methods of deposition of the layer of SOG such as enhancing the drop-supply of the SOG material (add SOG such that this added supply counteracts the formation of the edge bead) or by first removing the edge beads (in liquid form) before solidifying the deposited layer of SOG.
In conventional processing, low-k dielectric materials having high surface hardness are typically used to cover of layer of Inter Metal Dielectric (IMD). This is known to lead to a level of Edge Bead Remove (EBR) concentration around the perimeter of the low-k dielectric material which is unacceptable and which readily leads to peeling of the layer of low-k dielectric around the perimeter of this layer. The invention addresses this concern and provides a method that eliminates the build-up of excessive EBR around the perimeter of a layer of low-k dielectric material.
U.S. Pat. No. 6,114,747 (Wei et al.) show an edge bead removal and shaping process.
U.S. Pat. No. 5,879,577 (Weng et al.) and U.S. Pat. No. 5,783,382 (Lee et al.) are related edge bead patents.